Meta’s MTIA roadmap envisions MTIA 450 for inference-optimized scaling and MTIA 500 for even larger, expanding beyond 72-ASIC domains as part of a plan to keep in-house silicon ahead of AI demand.

MTIA 400 targets training, while MTIA 450 aims to double memory bandwidth (likely via HBM4) and MTIA 500 in 2027 would push further bandwidth and compute, signaling a four-generation family strategy.

The MTIA family includes MTIA 300, 400, 450, and 500, designed to replace commodity GPUs for both training and inference tasks with increasing complexity.

MTIA accelerators feature 16 dedicated message engines with RISC-V cores, NIC interfaces, and near-memory compute blocks delivering over 2.8 TB/s reduction throughput to enable line-rate AllReduce and ReduceScatter without touching the compute grid.

MTIA devices are built on eight 36 GB HBM3e stacks (288 GB total) delivering about 9.2 TB/s bandwidth, roughly 15% higher than last-gen rivals but still behind newer GPUs in peak bandwidth.

In production, HCCL provides up to 940 GB/s intra-rack, and training a 150B-parameter model on 40 accelerators achieved substantially faster total communication time versus a comparable GPU cluster.

MTIA 300 introduces express doorbells to cut per-transaction latency by about 800 nanoseconds by skipping an extra memory read.

MTIA 400 uses a heterogeneous multi-die design on a 3nm process with two compute dies, two I/O dies, and an SoC die, delivering about 12 petaFLOPS of MXFP4 at 1.7 GHz.

MTIA 300’s 216 GB of HBM3E supports larger local batch sizes, with a 1:1 CPU-to-accelerator ratio enabling efficient offloads and support for higher-precision data types.

System design mirrors enterprise accelerators: four MTIA 400s per compute blade, with PCIe switch, x86 host, scale-out NIC, and a rack housing 72 accelerators across 18 compute blades and eight switch blades.

The model routes PyTorch collectives through a topology-aware graph via c10d/torchcomms, optimizing communication to minimize cross-rack traffic.

MTIA 300 is a purpose-built chip aimed at outperforming GPUs for Deep Learning Recommendation Model training, offering over 1.8x speedup in forward and backward passes and competitive TCO.