Author: Jessica Jelke.

NASA has partnered with Microchip Technology to develop High-Performance Spaceflight Computing, a next-generation system-on-chip designed to vastly increase onboard space computing power.

The project matured under NASA’s Game Changing Development program, led by the Space Technology Mission Directorate at Langley and NASA’s Jet Propulsion Laboratory, guiding requirements, studies, and reviews before contracting with Microchip.

Additional information about the chips and project is available via NASA links and the go.nasa.gov resource.

This nationwide public-private effort is anchored by NASA, Microchip, and a broad ecosystem of academic and industry partners to strengthen U.S. leadership in spaceflight computing, improve supply chain resilience, and spur regional innovation and workforce development.

The new processors aim to deliver more than 100x the computing capability of current space processors and feature a scalable architecture that integrates computing and networking, with power-down capability for energy efficiency.

The product line includes a radiation-hardened version for deep-space and long-duration missions, and a radiation-tolerant version for commercial LEO satellites, both with fault tolerance and cybersecurity features.

Advanced Ethernet networking enables onboard processing of large data sets and real-time autonomous decisions, such as rover control and image filtering, with continuous system health monitoring and an integrated security controller.

Beyond space, the technology could enable Earth-based edge computing across automotive, aviation, industrial, aerospace, drones, energy, medical devices, and AI, leveraging a common tech base to reduce risk and cost.