TSMC Sues Employees for Trade Secret Theft Amid 2nm Chip Technology Race

August 5, 2025
TSMC Sues Employees for Trade Secret Theft Amid 2nm Chip Technology Race
  • TSMC's 2-nanometer technology is considered the most advanced in the semiconductor industry, known for its high density and energy efficiency.

  • This technology shift is projected to achieve a 10% to 15% speed improvement and a 25% to 30% reduction in power consumption compared to the current 3-nanometer technology.

  • As a critical player in Taiwan's economy, TSMC accounts for 8% of the nation's GDP and 12% of its exports, making the protection of its intellectual property vital.

  • This incident marks the first case of trade secret theft prosecuted under Taiwan’s National Security Act, aimed at safeguarding the country’s semiconductor industry.

  • The investigation highlights the increasing value of intellectual property in the context of rising geopolitical tensions involving the U.S. and China.

  • The incident has sparked discussions about the need for improved international cooperation on intellectual property protection, particularly given TSMC's critical role in the global semiconductor supply chain.

  • In response to the incident, TSMC is enhancing cybersecurity measures, including AI-driven anomaly detection and stricter employee vetting to prevent future incidents.

  • TSMC's CFO expressed optimism for the third quarter of 2025, anticipating continued support from demand for advanced process technologies.

  • Taiwan Semiconductor Manufacturing Co (TSMC) has initiated legal action against several employees suspected of attempting to steal trade secrets.

  • The unauthorized activities were detected during routine monitoring, prompting internal investigations and strict measures against those involved.

  • Despite the incident, TSMC stated that no customer data was compromised and that operations remain unaffected, although it raises concerns about intellectual property protection amid rising geopolitical tensions.

  • The theft involves critical schematics and manufacturing protocols necessary for scaling TSMC's advanced 2-nanometer chip production, which is set to begin by late 2025.

Summary based on 24 sources


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