Imec Unveils Ultra-Thin Superconducting Wires for Next-Gen High-Performance Computing

September 8, 2026
Imec Unveils Ultra-Thin Superconducting Wires for Next-Gen High-Performance Computing
  • Imec unveils a three-layer NbTiN superconducting circuit with roughly 3.8 million Josephson junctions per square centimeter, achieving superconducting wiring at a 30 nm linewidth to push toward high-density, CMOS-compatible manufacturing.

  • The 30 nm wiring is a pivotal advance, enabling denser, faster, and lower-loss superconducting traces, with NbTiN offered as a scalable alternative to conventional niobium-based superconductors.

  • Demoed wires at 30 nanometers—three NbTiN layers—are about ten times narrower than typical Nb-based wires, expanding connection density in the same area.

  • Takeaways stress density, integration, and CMOS-compatible processing as central to future viability, while noting commercialization hurdles such as cooling needs, logistics, process compatibility, and overall cost.

  • Beyond AI, potential applications span quantum control, photonics, neuromorphic systems, and high-resolution single-photon detection, indicating broad multi-market potential for the platform.

  • Industry collaboration among foundries, hyperscalers, and system companies is deemed essential to move superconducting logic from lab to mass-market, with a roadmap covering materials, devices, interconnects, EDA, and system integration.

  • Imec targets adoption by foundries, hyperscalers, and system companies, signaling a path for gradual integration into broader computing infrastructure.

  • Compatibility with 300 mm wafer processes and exploration of 2.5D/3D integration could ease adoption within existing fabrication ecosystems and enable larger, more complex circuits.

  • The report highlights potential energy savings and performance gains in future data centers and HPC, driven by ultra-dense superconducting circuitry and ultra-narrow wiring.

  • Energy efficiency and cooling costs are central considerations; superconducting switching could be orders of magnitude more energy-efficient than CMOS and dramatically boost compute density, but cryogenic infrastructure and total system costs are key challenges.

  • The technology promises higher computing density, greater bandwidth, reduced data movement energy, and potential impact across high-performance computing, data centers, quantum computing, photonics, and neuromorphic systems.

  • Design flexibility comes from controlled tuning of junction and wire properties, while deployment remains challenged by the need for maintaining superconductivity at extremely low temperatures.

Summary based on 2 sources


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